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AUTOMOTIVE MOSFET
PD - 95903
IRFBA1404PPBF
Typical Applications
l l l l l
Anti-lock Braking Systems (ABS) Electric Power Steering (EPS) Electric Braking Radiator Fan Control Lead-Free Advanced Process Technology Ultra Low On-Resistance Increase Current Handling Capability 175C Operating Temperature Fast Switching Dynamic dv/dt Rating Repetitive Avalanche Allowed up to Tjmax
G
HEXFET(R) Power MOSFET
D
VDSS = 40V RDS(on) = 3.7m ID = 206A
Benefits
l l l l l l l
S
Description
Specifically designed for Automotive applications, this Stripe Planar design of HEXFET(R) Power MOSFETs utilizes the latest processing techniques to achieve extremely low on-resistance per silicon area. Additional features of this MOSFET are a 175oC junction operating temperature, fast switching speed and improved ruggedness in single and repetitive avalanche. The Super-220 TM is a package that has been designed to have the same mechanical outline and pinout as the industry standard TO-220 but can house a considerably larger silicon die. The result is significantly increased current handling capability over both the TO-220 and the much larger TO247 package. The combination of extremely low on-resistance silicon and the Super-220 TM package makes it ideal to reduce the component count in multiparalled TO-220 applications, reduce system power dissipation, upgrade existing designs or have TO-247 performance in a TO-220 outline. This package has been designed to meet automotive, Q101, qualification standard. These benefits make this design an extremely efficient and reliable device for use in Automotive applications and a wide variety of other applications.
Super-220
Absolute Maximum Ratings
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS EAS IAR EAR dv/dt TJ TSTG
Parameter
Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Recommended clip force
Max.
206 145 650 300 2.0 20 480 See Fig.12a, 12b, 14, 15 5.0 -40 to + 175 -55 to + 175 300 (1.6mm from case ) 20
Units
A W W/C V mJ A mJ V/ns C N
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09/15/04
IRFBA1404PPBF
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss Coss Coss Coss eff.
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance
Min. 40 --- --- 2.0 106 --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- --- ---
Typ. --- 0.036 --- --- --- --- --- --- --- 160 35 42 17 140 72 26 2.0 5.0 7360 1680 240 6630 1490 1540
Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 3.7 m VGS = 10V, ID = 95A 4.0 V VDS = 10V, ID = 250A --- S VDS = 25V, ID = 60A 20 VDS = 40V, VGS = 0V A 250 VDS = 32V, VGS = 0V, TJ = 150C 200 VGS = 20V nA -200 VGS = -20V 200 ID = 95A --- nC VDS = 32V 60 VGS = 10V --- VDD = 20V --- ID = 95A ns --- RG = 2.5 --- RD = 0.21 D Between lead, --- 6mm (0.25in.) nH G from package --- and center of die contact S --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 32V, = 1.0MHz --- VGS = 0V, VDS = 0V to 32V
Source-Drain Ratings and Characteristics
IS
ISM
VSD trr Qrr ton
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol --- --- 206 showing the A G integral reverse --- --- 650 S p-n junction diode. --- --- 1.3 V TJ = 25C, IS = 95A, VGS = 0V --- 71 110 ns TJ = 25C, IF = 95A --- 180 270 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.5 ---
Max.
0.50 --- 58
Units
C/W
2
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IRFBA1404PPBF
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
1000
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP
100
100
4.5V
4.5V
10 0.1
20s PULSE WIDTH TJ = 25 C
1 10 100
10 0.1
20s PULSE WIDTH TJ = 175 C
1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
I D , Drain-to-Source Current (A)
TJ = 25 C TJ = 175 C
RDS(on) , Drain-to-Source On Resistance (Normalized)
ID = 159A
2.0
1.5
100
1.0
0.5
10 4.0
V DS = 25V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 9.0
0.0 -60 -40 -20 0
VGS = 10V
20 40 60 80 100 120 140 160 180
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFBA1404PPBF
12000
VGS , Gate-to-Source Voltage (V)
10000
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 95A VDS = 32V VDS = 20V
16
C, Capacitance (pF)
8000
Ciss
12
6000
8
4000
Coss
2000
4
Crss
0 1 10 100
0 0 40 80 120
FOR TEST CIRCUIT SEE FIGURE 13
160 200 240
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
I D , Drain Current (A)
TJ = 175 C
1000 10us
100
100
100us
TJ = 25 C
10
1ms 10 10ms
1 0.4
V GS = 0 V
0.8 1.2 1.6 2.0 2.4
1 1
TC = 25 C TJ = 175 C Single Pulse
10 100
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFBA1404PPBF
240
LIMITED BY PACKAGE
VDS V GS
RD
I D , Drain Current (A)
180
RG 10V
D.U.T.
+
-V DD
120
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
60
VDS 90%
0 25 50 75 100 125 150 175
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.20 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE)
0.1
PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC
0.01
0.001 0.00001
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFBA1404PPBF
EAS , Single Pulse Avalanche Energy (mJ)
15V
1000
TOP
800
VDS
L
DRIVER
BOTTOM
ID 39A 67A 95A
RG
20V
D.U.T
IAS tp
+ V - DD
600
A
0.01
400
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS tp
200
0 25 50 75 100 125 150 175
Starting TJ , Junction Temperature ( C)
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
10 V
QGS VG QGD
V DSav , Avalanche Voltage ( V )
50
48
Charge
46
Fig 13a. Basic Gate Charge Waveform
Current Regulator Same Type as D.U.T.
44
50K 12V .2F .3F
42
D.U.T. VGS
3mA
+ V - DS
40 0 20 40 60 80 100
IAV , Avalanche Current ( A)
IG ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current
6
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IRFBA1404PPBF
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
0.01
100
0.05 0.10
10
Allowed avalanche Current vs avalanche pulsewidth, tav assuming Tj = 25C due to avalanche losses
1 1.0E-08 1.0E-07 1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
500
EAR , Avalanche Energy (mJ)
400
TOP Single Pulse BOTTOM 10% Duty Cycle ID = 95A
300
200
100
0 25 50 75 100 125 150
Notes on Repetitive Avalanche Curves , Figures 15, 16: (For further info, see AN-1005 at www.irf.com) 1. Avalanche failures assumption: Purely a thermal phenomenon and failure occurs at a temperature far in excess of Tjmax. This is validated for every part type. 2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded. 3. Equation below based on circuit and waveforms shown in Figures 12a, 12b. 4. PD (ave) = Average power dissipation per single avalanche pulse. 5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase during avalanche). 6. Iav = Allowable avalanche current. 7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as 25C in Figure 15, 16). t av = Average time in avalanche. D = Duty cycle in avalanche = t av *f 175 ZthJC(D, tav) = Transient thermal resistance, see figure 11) PD (ave) = 1/2 ( 1.3*BV*Iav) = DT/ ZthJC Iav = 2DT/ [1.3*BV*Zth] EAS (AR) = PD (ave)*tav
Starting T J , Junction Temperature (C)
Fig 15. Maximum Avalanche Energy Vs. Temperature
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IRFBA1404PPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 16. For N-Channel HEXFET(R) Power MOSFETs
8
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IRFBA1404PPBF
Super-220 ( TO-273AA ) Package Outline
11.00 [.433] 10.00 [.394] 9.00 [. 8.00 [. 0.25 [
A
5.00 [.196] 4.00 [.158]
B
1.50 [.059] 0.50 [.020]
4
15.00 [.590] 14.00 [.552]
13.50 [. 12.50 [.
1
2
3
4.00 [.157] 3.50 [.138]
14.50 [.570] 13.00 [.512]
3X 2.55 [.100] 2X
1.30 [.051] 0.90 [.036] BA
4X
1.00 [.039] 0.70 [.028] 3.00 [.118] 2.50 [.099]
0.25 [.010]
MOSFET
IGBT
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25C, L = 0.11mH
RG = 25, IAS = 95A.
Pulse width 400s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS . Refer to AN-1001 Calculated continuous current based on maximum allowable junction temperature. Package limitation current is 95A.
ISD 95A, di/dt 150A/s, VDD V(BR)DSS,
TJ 175C
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IRFBA1404PPBF
Super-220 (TO-273AA) Part Marking Information
EXAMPLE: THIS IS AN IRFBA22N50A WITH ASSEMBLY LOT CODE 1789 ASSEMBLED ON WW 19, 1997 IN THE ASSEMBLY LINE "C" PART NUMBER INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE
IRFBA22N50A 719C 17 89
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
Note: "P" in assembly line position indicates "Lead-Free"
TOP
Super-220 not recommended for surface mount application
Data and specifications subject to change without notice. This product has been designed and qualified for the Automotive [Q101] market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.09/04
10
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